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? semiconductor components industries, llc, 2017 february, 2017 ? rev. p1 1 publication order number: NCL30059/d NCL30059 product preview high-voltage half-bridge controller for led lighting applications the NCL30059 is a self?oscillating high voltage mosfet driver primarily tailored for led driver applications using half?bridge topology. llc and lcc configurations are supported with optimized wide range control offered by the latter for constant current (cc) applications. due to its proprietary 600 v technology, the driver is useful for bulk voltages utilized in 277 vac lighting applications. operating frequency of the driver can be adjusted from 25 khz to 250 khz using a single resistor. adjustable brown?out protection assures correct bulk voltage operating range. an internal 100 ms pfc delay timer ensures the converter is enabled after the bulk voltage is fully stabilized. the device provides fixed dead?time which helps to lower the shoot?through current. features ? wide operating frequency range ? from 25 khz to 250 khz ? minimum frequency adjust accuracy 3% ? fixed dead time ? 0.6 s ? adjustable brown?out protection for a simple pfc association ? 100 ms pfc delay timer ? latched input for severe fault conditions, e.g. overtemperature or ovp ? internal 16 v v cc clamp ? low startup current of 50 a maximum ? 1 a / 0.5 a peak current sink / source drive capability ? operation up to 600 v bulk voltage ? internal temperature shutdown ? supports outdoor use: ?40 c to +125 c ? psr current regulation 2% ? efficiency up to 92% ? soic?8 package ? these are pb?free devices typical applications ? low cost resonant converters ? low parts count ? cv and cc led drivers ? wide output voltage range lcc drivers ? wallpack and bollard led drivers ? high bay and streetlight led drivers this document contains information on a product under development. on semiconductor reserves the right to change or discontinue this product without notice. device package shipping ? ordering information NCL30059bdr2g soic?8 (pb?free) 2500 / tape & reel marking diagram www. onsemi.com 1 8 soic?8 case 751 30059b alyww 1 8 a = assembly location l = wafer lot y = year ww = work week = pb?free package ?for information on tape and reel specifications, including part orientation and tape sizes, please refer to our t ape and reel packaging specification s brochure, brd8011/d. pinout diagram vcc rt bo gnd vboot mupper hb mlower
NCL30059 www. onsemi.com 2 figure 1. typical lcc application example vcc bo gnd rt mlower hb mupper vboot pfc front end ac input NCL30059 u1 +hv vcc return ccomp m1 rfstart cres m2 rbo2 rbo1 led1 css cboot cave diso led2 rfb2 chb rfb1 u2 rsense dboot lres rfmax rbias
NCL30059 www. onsemi.com 3 ? + ? + ? + ? + 20 s filter switch sw open for v bo > vref bo vref bo ? + v ref latch sw i hyster bo v cc rt v cc management pon reset tsd v cc clamp v cc v dd v ref pfc delay (100ms) v ref v dd ? + v ref i dt c t s d r clk q q pulse trigger level shifter uv detect delay s r q q v boot m uppe r bridg e m lowe r gnd v cc figure 2. internal circuit architecture 20 s filter sr q
NCL30059 www. onsemi.com 4 pin function description pin # pin name function pin description 1 v cc supplies the driver the driver accepts up to 16 v (given by internal zener clamp). 2 rt timing resistor connecting a resistor between this pin and gnd, sets the operating frequency 3 bo brown?out detects low input voltage conditions. when brought above v latch , it fully latches off the driver. 4 gnd ic ground ? 5 m lower low?side driver output drives the lower side mosfet. 6 hb half?bridge connection connects to the half?bridge output. 7 m upper high?side driver output drives the higher side mosfet. 8 v boot bootstrap pin the floating supply terminal for the upper stage. maximum ratings table symbol rating value unit v bridge high voltage bridge pin ? pin 6 ?1 to +600 v vboot ? vbridge floating supply voltage 0 to 20 v vdrv_hi high?side output voltage vbridge ? 0.3 to vboot + 0.3 v vdrv_lo low?side output voltage ?0.3 to v cc +0.3 v dvbridge/dt allowable output slew rate 50 v/ns i cc maximum current that can flow into v cc pin (pin 1), (note 1) 20 ma v_rt rt pin voltage ?0.3 to 5 v maximum voltage, all pins (except pins 4 and 5) ?0.3 to 10 v r ja thermal resistance junction?to?air, ic soldered on 50 mm 2 cooper 35 m 178 c/w r ja thermal resistance junction?to?air, ic soldered on 200 mm 2 cooper 35 m 147 c/w storage temperature range ?60 to +150 c esd capability, human body model (all pins except pins 1 , 6, 7 and 8) 2 kv esd capability, machine model (all pins except pins 1, 6, 7 and 8) 200 v stresses exceeding those listed in the maximum ratings table may damage the device. if any of these limits are exceeded, device function ality should not be assumed, damage may occur and reliability may be affected. 1. this device contains internal zener clamp connected between v cc and gnd terminals. current flowing into the v cc pin has to be limited by an external resistor when device is supplied from supply which voltage is higher than vcc clamp (16 v typically). the i cc parameter is specified for vbo = 0 v.
NCL30059 www. onsemi.com 5 electrical characteristics (for typical values t j = 25 c, for min/max values t j = ?40 c to +125 c, max t j = 150 c, v cc = 12 v, unless otherwise noted) characteristic pin symbol min typ max unit supply section turn?on threshold level, v cc going up 1 vcc on 10 11 12 v minimum operating voltage after turn?on 1 vcc min 8 9 10 v startup voltage on the floating section 1 vboot on 7.8 8.8 9.8 v cutoff voltage on the floating section 1 vboot min 7 8 9 v v cc level at which the internal logic gets reset 1 vcc reset ? 6.5 ? v startup current, v cc < vcc on , 0 c t amb +125 c 1 i cc ? ? 50 a startup current, v cc < vcc on , ?40 c t amb < 0 c 1 i cc ? ? 65 a internal ic consumption, no output load on pins 8/7 ? 5/4, fsw = 100 khz 1 i cc 1 ? 2.2 ? ma internal ic consumption, 1 nf output load on pins 8/7 ? 5/4, fsw = 100 khz 1 i cc 2 ? 3.4 ? ma consumption in fault mode (drivers disabled, v cc > v cc(min) , r t = 3.5 k ) 1 i cc 3 ? 2.56 ? ma consumption during pfc delay period, 0 c t amb +125 c i cc 4 ? ? 400 a consumption during pfc delay period, ?40 c t amb < 0 c i cc 4 ? ? 470 a internal ic consumption, no output load on pin 8/7 f ws = 100 khz 8 i boot1 ? 0.3 ? ma internal ic consumption, 1 nf output load on pin 8/7 f ws = 100 khz 8 i boot2 ? 1.44 ? ma consumption in fault mode (drivers disabled, v boot > vboot min ) 8 i boot3 ? 0.1 ? ma v cc zener clamp voltage @ 20 ma 1 vcc clamp 15.4 16 17.5 v internal oscillator minimum switching frequency, r t = 35 k on pin 2, d t = 600 ns 2 f sw min 24.25 25 25.75 khz maximum switching frequency, r t = 3.5 k on pin 2, d t = 600 ns 2 f sw max 208 245 282 khz reference voltage for all current generations 2 v ref rt 3.33 3.5 3.67 v internal resistance discharging c soft?start 2 rt discharge ? 500 ? operating duty cycle symmetry 5, 7 dc 48 50 52 % note: maximum capacitance directly connected to pin 2 must be under 100 pf. drive output output voltage rise time @ cl = 1 nf, 10?90% of output signal 5, 7 t r ? 40 ? ns output voltage fall time @ cl = 1 nf, 10?90% of output signal 5, 7 t f ? 20 ? ns source resistance 5, 7 r oh ? 12 ? sink resistance 5, 7 r ol ? 5 ? dead?time (measured between 50% of rise and fall edge) 5,7 t_dead 540 610 720 ns leakage current on high voltage pins to gnd (600 vdc) 6,7,8 ihv_leak ? ? 5 a protection brown?out input bias current 3 ibo bias ? 0.01 ? a brown?out level 3 v bo 0.95 1 1.05 v hysteresis current, v pin3 < vbo 3 i bo 15.6 18.2 20.7 a latching voltage on bo pin 3 v latch 1.9 2 2.1 v propagation delay before drivers are stopped 3 en delay ? 20 ? s delay before any driver restart ? pfc delay ? 100 ? ms temperature shutdown (guaranteed by design) ? tsd 140 ? ? c hysteresis ? tsd hyste ? 30 ? c
NCL30059 www. onsemi.com 6 11.01 11.00 10.99 10.98 10.97 10.96 10.95 10.94 10.93 10.92 10.91 ?40 ?20 0 20 40 60 80 100 120 voltage (v) temperature ( c) ?40 ?20 0 20 40 60 80 100 120 temperature ( c) voltage (v) 8.98 8.97 8.96 8.95 8.94 8.93 8.92 8.91 8.90 figure 3. v ccon figure 4. v ccmin voltage (v) ?40 ?20 0 20 40 60 80 100 120 temperature ( c) figure 5. v booton 8.85 8.80 8.75 8.70 8.65 8.60 8.55 temperature ( c) figure 6. v bootmin ?40 ?20 0 20 40 60 80 100 120 voltage (v) 8.10 8.05 8.00 7.95 7.90 7.85 7.80 7.75 ?40 ?20 0 20 40 60 80 100 120 temperature ( c) figure 7. r oh 20 18 16 14 12 10 8 6 4 2 0 temperature ( c) figure 8. r ol ?40 ?20 0 20 40 60 80 100 120 8 7 6 5 4 3 2 1 0 resistance ( ) resistance ( )
NCL30059 www. onsemi.com 7 ?40 ?20 0 20 40 60 80 100 120 temperature ( c) figure 9. f swmax frequency (khz) 243.4 temperature ( c) figure 10. f swmin ?40 ?20 0 20 40 60 80 100 120 frequency (khz) 25.05 25.00 24.95 24.90 24.85 24.80 24.75 ?40 ?20 0 20 40 60 80 100 120 temperature ( c) figure 11. i cc_startup 45.0 40.0 35.0 30.0 25.0 20.0 15.0 10.0 5.0 0.0 450 temperature ( c) figure 12. i cc4 ?40 ?20 0 20 40 60 80 100 120 400 350 300 250 200 150 100 50 0 ?40 ?20 0 20 40 60 80 100 120 temperature ( c) figure 13. r t _ discharge 580 560 540 520 500 480 460 440 420 400 time (ns) 645 ?40 ?20 0 20 40 60 80 100 120 temperature ( c) figure 14. t dead 640 635 630 625 620 615 610 current ( a) current ( a) resistance ( ) 243.2 243.0 242.8 242.6 242.4 242.2 242.0 241.8
NCL30059 www. onsemi.com 8 ?40 ?20 0 20 40 60 80 100 120 temperature ( c) figure 15. pfc delay 109 time (ms) 108 107 106 105 104 103 102 101 100 90 temperature ( c) figure 16. v latch ?40 ?20 0 20 40 60 80 100 12 0 2.008 voltage (v) 2.006 2.004 2.002 2.000 1.998 1.996 1.994 1.992 1.990 ?40 ?20 0 20 40 60 80 100 120 temperature ( c) figure 17. v bo voltage (v) 1.015 1.014 1.013 1.012 1.011 1.010 1.009 1.008 1.007 ?40 ?20 0 20 40 60 80 100 12 0 temperature ( c) figure 18. i bo 19.4 19.2 19.0 18.8 18.6 18.4 18.2 18.0 17.8 17.6 17.4 current ( a) temperature ( c) figure 19. v cc_clamp ?40 ?20 0 20 40 60 80 100 120 voltage (v) 17.0 16.8 16.6 16.4 16.2 16.0 15.8 figure 20. i rt and appropriate frequency i rt (ma) frequency (khz) 0.2 290 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 1.1 1. 240 190 140 90 40
NCL30059 www. onsemi.com 9 application information the NCL30059 is primarily intended to drive low cost half?bridge applications. it supports llc and optimized lcc topologies offering wide output voltage range in constant current (cc) mode making it ideal for led drivers. the ic includes several features that help the designer to cope with resonant spms design. all features are described thereafter: ? wide operating frequency range : the internal current controlled oscillator is capable to operate over wide frequency range up to 250 khz. minimum frequency accuracy is 3%. ? fixed dead?time : internal dead?time control is optimized to avoid cross conduction or shoot?through during transitions between low and high side conduction. ? 100 ms pfc timer : fixed delay is placed to ic operation whenever the driver restarts (vcc on or bo_ok detect events). this delay assures that the bulk voltage will be stabilized prior to switching operation. another benefit of this delay is that the soft start capacitor will be fully discharged before any restart. ? brown?out detection : the bo input monitors bulk voltage level via resistor divider and thus assures that the application is working only for wanted bulk voltage band. the bo input sinks current of 18.2 a until the vref bo threshold is reached. designer can thus adjust the bulk voltage hysteresis according to the application needs. ? latched input : the latched comparator input is connected in parallel to the bo terminal to allow the designer latch the ic if necessary ? overvoltage or overtemperature shutdown can be implemented using this latch. the supply voltage has to be cycled down below vcc reset threshold, or v bo diminished under v bo level to reset the latch and enable restart. ? internal v cc clamp : the internal zener clamp offers a way to prepare passive voltage regulator to maintain v cc voltage at 16 v in case the controller is supplied from unregulated power supply or from bulk capacitor. ? low startup current : this device features maximum startup current of 50 a which allows the designer to use high value startup resistor for applications when driver is supplied from the auxiliary winding. power dissipation of startup resistor is thus significantly reduced. current controlled oscillator the current controlled oscillator features a high?speed circuitry allowing operation from 50 khz up to 500 khz. however, as a division by two internally creates the two q and q outputs, the final effective signal on output mlower and mupper switches between 25 khz and 250 khz. the vco is configured in such a way that if the current that flows out from the rt pin increases, the switching frequency also goes up. figure 21 shows the architecture of this oscillator. figure 21. the internal current controlled oscillator architecture ? + ? + delay v ref rt from pfc delay c t r t r t v ref s d clk r i dt q q v dd a b dead time pon reset c soft?start + ? + ? r soft?start
NCL30059 www. onsemi.com 10 the internal timing capacitor ct is charged by current which is proportional to the current flowing out from the rt pin. the discharging current i dt is applied when voltage on this capacitor reaches 2.5 v. the output drivers are disabled during discharge period so the dead time length is given by the discharge current sink capability. discharge sink is disabled when voltage on the timing capacitor reaches zero and charging cycle starts again. the charging current and thus also whole oscillator is disabled during the pfc delay period to keep the ic consumption below 400 a. this is valuable for applications that are supplied from auxiliary winding and v cc capacitor is supposed to provide energy during pfc delay period. for resonant led driver applications it is necessary to adjust minimum operating frequency with high accuracy. the designer also needs to limit maximum operating and startup frequency. all these parameters can be adjusted using few external components connected to the rt pin as depicted in figure 22. figure 22. typical rt pin connection r fmax r t v cc r t r fstart r bias r fmax?cc r comp c comp c ss d1 tlv431 (to primary current sensor) (to secondary voltage regulator) NCL30059 voltage feedback current feedback the minimum switching frequency is given by the rt resistor value. this frequency is reached if there is no optocoupler or current feedback action and soft start period has been already finished. the maximum switching frequency excursion is limited by the rf max selection. note that the f max value is influenced by the optocoupler saturation voltage value. resistor rf start together with capacitor c ss prepares the soft start period after pfc timer elapses. the rt pin is grounded via an internal switch during the pfc delay period to assure that the soft start capacitor will be fully discharged via rfstart resistor. constant led current is achieved using a feedback loop monitoring the primary current. the sensing voltage must be scaled by the turns ratio of the transformer. the rt pin reference voltage is vref rt = 3.5 v. the control regulator operates on the difference between the rt pin reference voltage and the minimum voltage compliance of the regulator. this voltage difference is applied across r fmax?cc . the tlv431 shunt regulator is used in figure 22 as the constant current control regulator. diode d1 is used to establish minimum regulator bias current via resistor r bias . total saturation voltage of this solution is 1.25 + 0.6 = 1.85 v for room temperature. shottky diode will further decrease saturation voltage. the rf max?cc resistor limits the maximum frequency delivered by this regulation loop. this parameter is affected by d1 temperature drift. brown?out protection the brown?out circuitry (bo) offers a way to protect the application from low dc input voltages. operation is blocked below a set threshold. hysteresis is provided by the switched current source providing stable operation. the internal circuitry, depicted by figure 23, offers a way to monitor the high?voltage (hv) rail.
NCL30059 www. onsemi.com 11 figure 23. the internal brown?out configuration with an offset current sink ? + r upper bo r lower v refbo i bo sw 20 s filter v bulk high level for 50 ms after v cc on to bo_ok and gates to pfc delay + ? a resistive divider made of r upper and r lower , brings a portion of the hv rail on pin 3. below the turn?on level, the 18.2 a current sink (i bo ) is on. therefore, the turn?on level is higher than the level given by the division ratio brought by the resistive divider. to the contrary, when the internal bo_ok signal is high (pfc timer runs or mlower and mupper pulse), the i bo sink is deactivated. as a result, it becomes possible to select the turn?on and turn?of f levels via a few lines of algebra: i bo is on vref bo v bulk1 r lower r lower r upper i bo r lower r upper r lower r upper (eq. 1) i bo is off vref bo v bulk2 r lower r lower r upper (eq. 2) we can extract r lower from equation 2 and plug it into equation 1, then solve for r upper : r lower vref bo v bulk1 v bulk2 i bo v bulk2 vref bo (eq. 3) r upper r lower v bulk2 vref bo vref bo (eq. 4) if we decide to turn?on our converter for v bulk1 equals 350 v and turn it off for v bulk2 equals 250 v, then for i bo = 18.2 a and vref bo = 1.0 v we obtain: r upper = 5.494 m r lower = 22.066 v the bridge power dissipation is 400 2 / 5.517 m = 29 mw when front?end pfc stage delivers 400 v. figure 24 simulation result confirms our calculations.
NCL30059 www. onsemi.com 12 figure 24. simulation results for 350/250 on/off brown?out levels figure 25. bo input functionality ? v bulk2 < v bulk < v bulk1
NCL30059 www. onsemi.com 13 figure 26. bo input functionality ?v bulk2 < v bulk < v bulk1 , pfc start follows figure 27. bo input functionality ? v bulk > v bulk1
NCL30059 www. onsemi.com 14 figure 28. bo input functionality ? v bulk < v bulk2 , pfc start follows the i bo current sink is turned on for 50 ms after any controller restart to let the bo input voltage stabilize (there can be connected big capacitor to the bo input and the i bo is only 18.2 a so it will take some time to dischar ge). once the 50 ms one shoot pulse ends the bo comparator is supposed to either hold the i bo sink turned on (if the bulk voltage level is not suf ficient) or let it turned off (if the bulk voltage is higher than v bulk1 ). see figures 25 through 28 for better understanding on how the bo input works. latched?off protection there are some situations where the converter shall be fully turned?off and stay latched. this can happen in presence of an overvoltage (the feedback loop is drifting) or when an overtemperature is detected. due to the addition of a comparator on the bo pin, a simple external circuit can lift up this pin above v latch (2 v typical) and permanently disable pulses. the v cc needs to be cycled down below 6.5 v typically to reset the controller. figure 29. adding a comparator on the bo pin offers a way to latch?off the controller ? + ? + bo_ok to permanent latch sw v refbo high level for 50 ms after v cc on v ref latch r upper bo r lower 20 s filter v bulk i bo v cc q1 ntc v out 20 s filter to pfc delay + ? + ? on figure 29, q1 is biased off and does not affect the bo measurement as long as the ntc and the optocoupler are not activated. as soon as the secondary optocoupler senses an ovp condition, or the ntc reacts to a high ambient temperature, q1 base is biased on and the bo pin goes up, permanently latching off the controller. the high?voltage driver figure 30 shows the internal architecture of the high?voltage section. the device incorporates an upper uvlo circuitry that makes sure enough v gs is available for the upper side mosfet. the v cc for floating driver section is provided by c boot capacitor that is refilled by external bootstrap diode.
NCL30059 www. onsemi.com 15 figure 30. the internal high?voltage section of the NCL30059 m upper delay uv detect hb v cc m lower gnd pulse trigger level shifter from latch high if ok from pfc delay v boot s r q q c boot a b dead time a b + d boot v aux v bulk the a and b outputs are delivered by the internal logic, as depicted in block diagram. this logic is constructed in such a way that the m lower driver starts to pulse firs after any driver restart. the bootstrap capacitor is thus charged during first pulse. a delay is inserted in the lower rail to ensure good matching between these propagating signals. as stated in the maximum rating section, the floating portion can go up to 600 vdc and makes the ic perfectly suitable for offline applications featuring a 400 v pfc front?end stage.
NCL30059 www. onsemi.com 16 package dimensions soic?8 nb case 751?07 issue ak seating plane 1 4 5 8 n j x 45 k notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimension a and b do not include mold protrusion. 4. maximum mold protrusion 0.15 (0.006) per side. 5. dimension d does not include dambar protrusion. allowable dambar protrusion shall be 0.127 (0.005) total in excess of the d dimension at maximum material condition. 6. 751?01 thru 751?06 are obsolete. new standard is 751?07. a b s d h c 0.10 (0.004) dim a min max min max inches 4.80 5.00 0.189 0.197 millimeters b 3.80 4.00 0.150 0.157 c 1.35 1.75 0.053 0.069 d 0.33 0.51 0.013 0.020 g 1.27 bsc 0.050 bsc h 0.10 0.25 0.004 0.010 j 0.19 0.25 0.007 0.010 k 0.40 1.27 0.016 0.050 m 0 8 0 8 n 0.25 0.50 0.010 0.020 s 5.80 6.20 0.228 0.244 ?x? ?y? g m y m 0.25 (0.010) ?z? y m 0.25 (0.010) z s x s m 1.52 0.060 7.0 0.275 0.6 0.024 1.270 0.050 4.0 0.155 mm inches scale 6:1 *for additional information on our pb?free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. soldering footprint* on semiconductor and are trademarks of semiconductor components industries, llc dba on semiconductor or its subsidiaries i n the united states and/or other countries. on semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property . a listing of on semiconductor?s product/patent coverage may be accessed at www.onsemi.com/site/pdf/patent?marking.pdf . on semiconductor reserves the right to make changes without further notice to any products herein. on semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does o n semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including wi thout limitation special, consequential or incidental damages. buyer is responsible for its products and applications using on semiconductor products, including compliance with all laws, reg ulations and safety requirements or standards, regardless of any support or applications information provided by on semiconductor. ?typical? parameters which may be provided in on semiconductor data sheets and/or specifications can and do vary in dif ferent applications and actual performance may vary over time. all operating parameters, including ?typic als? must be validated for each customer application by customer?s technical experts. on semiconductor does not convey any license under its patent rights nor the right s of others. on semiconductor products are not designed, intended, or authorized for use as a critical component in life support systems or any fda class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for implantation in the human body. should buyer purchase or use on semicondu ctor products for any such unintended or unauthorized application, buyer shall indemnify and hold on semiconductor and its officers, employees, subsidiaries, affiliates, and distrib utors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that on semiconductor was negligent regarding the design or manufacture of the part. on semiconductor is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyright laws and is not for resale in any manner. p ublication ordering information n. american technical support : 800?282?9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81?3?5817?1050 NCL30059/d literature fulfillment : literature distribution center for on semiconductor 19521 e. 32nd pkwy, aurora, colorado 80011 usa phone : 303?675?2175 or 800?344?3860 toll free usa/canada fax : 303?675?2176 or 800?344?3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your loc al sales representative ?

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